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| M74HC181 ARITHMETIC LOGIC UNIT/FUNCTION GENERATOR .HI .LOWPOWERDI .HI .OUTPUTDRI .SYMMETRI .BALANCEDPROPAGATI .WI .PI GH SPEED tPD = 13 ns (TYP.) AT VCC = 5 V SSIPATION ICC = 4 A (MAX.) at TA = 25 C GH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) VE CAPABILITY 10 LSTTL LOADS CAL OUTPUT IMPEDANCE IOH = IOL = 4 mA (MIN.) ON DELAYS tPLH = tPHL DE OPERATING VOLTAGE RANGE VCC (OPR) = 2 V to 6 V N AND FUNCTION COMPATIBLE WITH 54/74LS181 B1R (Plastic Package) M1R (Micro Package) ORDER CODES : M74HC181M1R M74HC181B1R DESCRIPTION The 74HC181 is a high speed CMOS ARITHMETIC LOGIC UNIT/FUNCTION GENERATOR fabricated with silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. These circuits perform 16 binary arithmetic operations on two 4-bit words as shown in tables 1 and 2. These operations are selected by the four function-select lines (S0, S1, S2, S3) and include addition, subtraction, decrement, and straight transfer. When performing arithmetic manipulations, the internal carries must be enabled by applying a low-level voltage to the mode control input (M). A full carry look-ahead scheme is made available in these devices for fast, simultaneous carry generation by means of two cascade-outputs (pins 15 and 17) for the four bits in the package. When used in conjunction with the M54HC182 or M74HC182, full carry look-ahead circuits, high-speed arithmetic operations can be performed. These circuits will accomodate active-high or active-low data, if the pin designations are interpreted as shown below. Subtraction is accomplished by 1,s complement addition where the 1's complement of the subtrahend is generated internally. The resultant output is 1-B-1, which requires an endaround or forced carry to produce A-B. The 181 can also be utilized as a comparator. The A = B output is internally decoded from the function outputs (F0, F1, F2, F3) so that when two words of equal magnitude are applied at the A and B inputs, it will assume a high level to indicated equality (A = B). The ALU should be October 1993 PIN CONNECTIONS (top view) * Open drain Output Structure 1/13 M74HC181 DESCRIPTION (continued) in the subtract mode with Cn = H when performing this comparison. The A = B output is open-drain so that it can be wire-AND connected to give a comparison for more that four bits. The carry output (Cn + 4) can also be used to supply relative magnitude information. Again, the ALU should be placed in the subtract mode by placing the function select inputs S3, S2, S1, S0 at L, H, H, L, respectively. These circuits have been designed to not only incorporate all of the designer's reINPUT AND OUTPUT EQUIVALENT CIRCUITS quirements for arithmetic operations, but also to provide 16 possible functions of two Boolean variables without the use of external circuitry. These logic functions are selected by use of the four function-select inputs (S0, S1, S2, S3) with the mode-control input (M) at a high level to disable the internal carry. All inputs are equipped with protection circuits against static discharge and transient excess voltage. ONLY OUTPUT A = B IEC LOGIC SYMBOLS PIN DESCRIPTION PIN No 2, 23, 21, 19 1, 22, 20, 18 6, 5, 4, 3 7 8 9, 10, 11, 13 14 15 16 17 12 24 SYMBOL A0 to A3 B0 to B3 S0 to S3 Cn M F0 to F3 A=B P Cn + 4 G GND VCC 9 F0 F0 10 F1 F1 11 F2 F2 13 F3 F3 NAME AND FUNCTION Word A Inputs Word B Inputs Function Select Inputs Inv. Carry Input Mode Control Input Function Outputs Comparator Output Carry Propagate Output Inv. Carry Output Carry Generate Output Ground (0V) Positive Supply Voltage 7 Cn Cn 16 Cn + 4 Cn + 4 15 P X 17 G Y PIN NUMBER ACTIVE LOW DATA (Table 1) 2 A0 1 B0 B0 23 A1 A1 22 B1 B1 21 A2 A2 20 B2 B2 19 A3 A3 18 B3 B3 ACTIVE HIGH DATA (Table 1) A0 Input Cn H H L L 2/13 Output Cn + 4 H L H L Active LOW Data (Figure 1) AB AB AB Active HIGH Data (Figure 2) AB A>B AM74HC181 TRUTH TABLE 1 Selection S3 L L L L L L L L H H H H H H H H S2 L L L L H H H H L L L L H H H H S1 L L H H L L H H L L H H L L H H S0 L H L H L H L H L H L H L H L H M = H Logic Functions F F F F F F F F F F F F F F F F =A = AB =A+B =1 =A+B =B =AB =A+B = AB =AB =B =A+B =0 = AB = AB =A F F F F F F F F F F F F F F F F ACTIVE LOW DATA M = L: Arithmetic Cn = L (no carry) = A Minus 1 F = AB Minus 1 F = AB Minus 1 F = Minus 1 (2's Compl) F = A Plus (A + B) F = AB Plus (A + B) F = A Minus B Minus 1 F =A+B F = A Plus (A + B) F = A Plus B F = AB Plus (A + B) F =A+B F = A Plus A * F = AB Plus A F = AB Plus A F =A F Operations Cn = H (with carry) =A = AB = (AB) = Zero = A Plus (A + B) Plus 1 = AB Plus (A + B) Plus 1 = A Minus B = (A + B) Plus 1 = A Plus (A + B) Plus 1 = A Plus B Plus 1 = AB Plus (A + B) Plus 1 = (A + B) Plus 1 = A Plus A Plus 1 = AB Plus A Plus 1 = AB Plus A Plus 1 = A Plus 1 * Each bit is shifted to the next more significant position. FIGURE 1 3/13 M74HC181 TRUTH TABLE 2 Selection S3 L L L L L L L L H H H H H H H H S2 L L L L H H H H L L L L H H H H S1 L L H H L L H H L L H H L L H H S0 L H L H L H L H L H L H L H L H M = H Logic Functions F F F F F F F F F F F F F F F F =A =A+B = AB =0 = AB =B =AB = AB =A+B =AB =B = AB =1 =A+B =A+B =A F F F F F F F F F F F F F F F F ACTIVE HIGH DATA M = L: Arithmetic Cn = H (no carry) =A F =A+B F =A+B F = Minus 1 (2's Compl) F = A Plus (AB) F = (A + B) Plus AB F = A Minus B Minus 1 F = AB Minus 1 F = A Plus AB F = A Plus B F = (A + B) Plus AB F = AB Minus 1 F = A Plus A * F = (A + B) Plus A F = (A + B) Plus A F = A Minus 1 F Operations Cn = L (with carry) = A Plus 1 = (A + B) Plus 1 = (A + B) Plus 1 = Zero = A Plus AB Plus 1 = (A + B) Plus (AB) Plus 1 = A Minus B = AB = A Plus AB Plus 1 = A Plus B Plus 1 = (A + B) Plus AB Plus 1 = AB = A Plus A Plus 1 = (A + B) Plus A Plus 1 = (A + B) Plus A Plus 1 =A * Each bit is shifted to the next more significant position. FIGURE 2 4/13 M74HC181 LOGIC DIAGRAM 5/13 M74HC181 ABSOLUTE MAXIMUM RATINGS Symbol VCC VI VO IIK IOK IO ICC or IGND PD Tstg TL Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current DC Output Source Sink Current Per Output Pin DC VCC or Ground Current Power Dissipation Storage Temperature Lead Temperature (10 sec) Parameter Value -0.5 to +7 -0.5 to VCC + 0.5 -0.5 to VCC + 0.5 20 20 25 50 500 (*) -65 to +150 300 Unit V V V mA mA mA mA mW o o C C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition isnotimplied. (*) 500 mW: 65 oC derate to 300 mW by 10mW/oC: 65 oC to 85 oC RECOMMENDED OPERATING CONDITIONS Symbol VCC VI VO Top tr, tf Parameter Supply Voltage Input Voltage Output Voltage Operating Temperature Input Rise and Fall Time VCC = 2 V VCC = 4.5 V VCC = 6 V Value 2 to 6 0 to VCC 0 to VCC -40 to +85 0 to 1000 0 to 500 0 to 400 Unit V V o V C ns 6/13 M74HC181 DC SPECIFICATIONS Test Conditions Symbol VIH Parameter High Level Input Voltage VCC (V) 2.0 4.5 6.0 V IL Low Level Input Voltage High Level Output Voltage (except A = B output) 2.0 4.5 6.0 V OH 2.0 4.5 6.0 4.5 6.0 VOL Low Level Output Voltage 2.0 4.5 6.0 4.5 II ICC Input Leakage Current Quiescent Supply Current 6.0 6.0 6.0 VI = IO=-20 A VIH or V IL IO=-4.0 mA IO=-5.2 mA VI = IO= 20 A VIH or V IL IO= 4.0 mA IO= 5.2 mA VI = VCC or GND VI = VCC or GND 1.9 4.4 5.9 4.18 5.68 2.0 4.5 6.0 4.31 5.8 0.0 0.0 0.0 0.17 0.18 0.1 0.1 0.1 0.26 0.26 0.1 4 Value TA = 25 oC Min. Typ. Max. 1.5 3.15 4.2 0.5 1.35 1.8 1.9 4.4 5.9 4.13 5.63 0.1 0.1 0.1 0.33 0.33 1 40 A A V V -40 to 85 oC Min. Max. 1.5 3.15 4.2 0.5 1.35 1.8 V V Unit 7/13 M74HC181 AC ELECTRICAL CHARACTERISTICS (C L = 50 pF, Input t r = tf = 6 ns) Test Conditions Symbol Parameter VCC (V) 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 Value -40 to 85 oC TA = 25 oC 54HC and 74HC 74HC Min. Typ. Max. Min. Max. 30 75 95 8 15 19 7 13 16 54 120 150 16 24 30 13 20 26 90 215 270 26 43 54 20 37 46 97 215 270 27 43 54 21 37 46 80 180 225 23 36 45 18 31 38 81 190 240 24 38 48 19 32 41 80 180 225 23 36 45 18 31 38 80 170 215 23 34 43 18 29 37 80 170 215 23 34 43 18 29 37 95 220 275 27 44 55 21 37 47 95 220 275 27 44 55 21 37 47 86 200 250 24 40 50 18 34 43 92 210 265 27 42 53 27 36 45 5 10 10 195 Unit tTLH tTHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLZ tPZL CIN CPD (*) Output Transition Time ns Propagation Delay Time (1) Propagation Delay Time (2) Propagation Delay Time (3) Propagation Delay Time (4) Propagation Delay Time (5) Propagation Delay Time (6) Propagation Delay Time (7) Propagation Delay Time (8) Propagation Delay Time (9) Propagation Delay Time (10) Propagation Delay Time (11) Propagation Delay Time (12) Input Capacitance Power Dissipation Capacitance ns ns ns ns ns ns ns ns ns ns ns RL = 1k ns pF pF (*) CPD is defined as the value of the IC's internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operting current can be obtained by the following equation. ICC(opr) = CPD *VCC *fIN + ICC 8/13 M74HC181 PROPAGATION DELAY TIME TEST CONDITIONS Test No (1) (2) (3) (4) (5) (6) (7) (8) (9) (10) (11) (12) INPUT Cn Any A or B Any A or B Cn Any A or B Any A or B Any A or B Any A or B Ai or Bi Ai or Bi Ai or Bi Any A or B OUTPUT Cn + 4 Cn + 4 Cn + 4 Any F G G F F Fi Fi Fi A=B Test Conditions M = GND, S0 = S3 = VCC, S1 = S2 GND (SUM mode) M = GND, S0 = S3 = GND, S1 = S2 VCC (DIFF mode) M = GND (SUM or DIFF mode) M = GND, S0 = S3 = VCC, S1 = S2 GND (SUM mode) M = GND, S0 = S3 = GND, S1 = S2 VCC (DIFF mode) M = GND, S0 = S3 = VCC, S1 = S2 GND (SUM mode) M = GND, S0 = S3 = GND, S1 = S2 VCC (DIFF mode) M = GND, S0 = S3 = VCC, S1 = S2 GND (SUM mode) M = GND, S0 = S3 = GND, S1 = S2 VCC (DIFF mode) M = VCC (Logic mode) M = GND, S0 = S3 = GND, S1 = S2 VCC (DIFF mode) SWITCHING CHARACTERISTICS TEST WAVEFORM 9/13 M74HC181 TEST CIRCUIT ICC (Opr.) Input Condition : A0, A1, A2, A3, S0, S3, Cn = VDD B1, B2, B3, S1, S2, M = GND INPUT WAVEFORM IS THE SAME AS THAT IN CASE OF SWITCHING CHARACTERISTICS TEST. 10/13 M74HC181 Plastic DIP24 (0.25) MECHANICAL DATA mm MIN. a1 b b1 b2 D E e e3 F I L 4.445 3.3 15.2 2.54 27.94 14.1 0.175 0.130 0.23 1.27 32.2 16.68 0.598 0.100 1.100 0.555 TYP. 0.63 0.45 0.31 0.009 0.050 1.268 0.657 MAX. MIN. inch TYP. 0.025 0.018 0.012 MAX. DIM. P043A 11/13 M74HC181 SO24 MECHANICAL DATA mm MIN. A a1 a2 b b1 C c1 D E e e3 F L S 7.40 0.50 15.20 10.00 1.27 13.97 7.60 1.27 8 (max.) 0.291 0.19 15.60 10.65 0.35 0.23 0.50 45 (typ.) 0.598 0.393 0.05 0.55 0.299 0.050 0.614 0.420 0.10 TYP. MAX. 2.65 0.20 2.45 0.49 0.32 0.013 0.009 0.020 0.004 MIN. inch TYP. MAX. 0.104 0.007 0.096 0.019 0.012 DIM. L C c1 a2 A e3 E D 24 13 1 12 12/13 F a1 b e s b1 M74HC181 Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use ascritical components in life support devices or systems without express written approval of SGS-THOMSON Microelectonics. (c) 1994 SGS-THOMSON Microelectronics - All Rights Reserved SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A 13/13 |
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